Class-Kicked Ass (Adder/Subtracter, Two's Complement)
11 years ago
General
(refer to previous journal for
atma505 LIFE STATUS 'n shizz)
My Computer Systems teacher is a nice guy but jesus almighty, he's moving through material faster than greased lightning
I've had a little help from folks, but this is a callout to anybody at all who knows anything about Number Systems and/or using Two's Complement in reference to an Adder/Subtracter Circuit
I'm transferring between decimal, binary and hex pretty good, and I can use two's complement no problem to negate a binary number, but I have no idea how in the world to apply it to an Adder/Subtracter with four Full Adders, or how to get the Carry Flag value, Overflow, Sign, True Sign, and whatever the heck Z is
This is the chart we're going by, btw: http://tinyurl.com/mzoe6vn
If anybody can help I'll love you forever
atma505 LIFE STATUS 'n shizz)My Computer Systems teacher is a nice guy but jesus almighty, he's moving through material faster than greased lightning
I've had a little help from folks, but this is a callout to anybody at all who knows anything about Number Systems and/or using Two's Complement in reference to an Adder/Subtracter Circuit
I'm transferring between decimal, binary and hex pretty good, and I can use two's complement no problem to negate a binary number, but I have no idea how in the world to apply it to an Adder/Subtracter with four Full Adders, or how to get the Carry Flag value, Overflow, Sign, True Sign, and whatever the heck Z is
This is the chart we're going by, btw: http://tinyurl.com/mzoe6vn
If anybody can help I'll love you forever
FA+

As far as carry goes, simple addition parts have 3 inputs and 2 outputs - data1, data2, carry in, carry out and result. The different bits are stackued together so the carry out of one element goes to carry in of other, allowing larger numbers to be added together with more and more elements.
Z is zero, and the other bits sound awfully similar to CPU flags register which is used to act decide whether or not to branch code somewhere else in most cases. Z you'll get by checking if all output bits are zero, job for simple logic. Carry flag is the final Carry out of the adding elements chain. Overflow happens when carry bit changes after math operation, True Sign is last bit of the data, when that bit is set you always have a negative number.
Okay, after studying a zillion Powerpoint slides, I think I've got most of it down, you can let me know if I have this all right:
http://tinyurl.com/psl4k9v
C is 0 = No final Carry
V is 0 = No overflow, sign bit stayed the same
S is 0 = Sign is positive
Z: I'm still not too sure about this one, it has 4 inputs? 0+1+0+0 outputs a 0 with an NOR gate, right? How do you account for 4 inputs?
Sign of the true result: 0 because you XOR gate V and S, which means the sign of the true result is positive
All seems good to me.